Unsigned Division; Output Formats - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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B Division Exceptions
The DIVS primitive is executed once, with the proper operands (ex. DIVS
AY1, AX0) to compute the sign of the quotient. The sign bit of the quotient
is determined by XORing (exclusive-or) the sign bits of each operand. The
entire 32-bit dividend is shifted left one bit. The lower fifteen bits of the
dividend with the recently determined sign bit appended are stored in
AY0, while the lower fifteen bits of the upper word, with the MSB of the
lower word appended is stored in AF.
To complete the division, 15 DIVQ instructions are executed. Operation of
the DIVQ primitive is described below.
B.1.2
Computing an unsigned division is done like signed division, except the
first instruction is not a DIVS, but another DIVQ. The upper word of the
dividend must be stored in AF, and the AQ bit of the ASTAT register
must be set to zero before the divide begins.
The DIVQ instruction uses the AQ bit of the ASTAT register to determine
if the dividend should be added to, or subtracted from the partial
remainder stored in AF and AY0. If AQ is zero, a subtract occurs. A new
value for AQ is determined by XORing the MSB of the divisor with the
MSB of the dividend. The 32-bit dividend is shifted left one bit, and the
inverted value of AQ is moved into the LSB.
B.1.3
As in multiplication, the format of a division result is based on the format
of the input operands. The division logic has been designed to work most
efficiently with fully fractional numbers, those most commonly used in
fixed-point DSP applications. A signed, fully fractional number uses one
bit before the binary point as the sign, with fifteen (or thirty-one in double
precision) bits to the right, for magnitude.
If the dividend is in M.N format (M bits before the binary point, N bits
after), and the divisor is O.P format, the quotient's format will be
(M-O+1).(N-P-1). As you can see, dividing a 1.31 number by a 1.15
number will produce a quotient whose format is (1-1+1).(31-15-1) or 1.15.
Before dividing two numbers, you must ensure that the format of the
quotient will be valid. For example, if you attempted to divide a 32.0
number by a 1.15 number the result would attempt to be in
(32-1+1).(0-15-1) or 32.-16 format. This cannot be represented in a 16-bit
register!
B – 2

Unsigned Division

Output Formats

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