Analog Devices adsp-2100 Manual page 231

10 Memory Interface
To execute the boot operation, the boot address generator generates the
appropriate byte addresses and loads internal program memory with the
contents of the EPROM. The internal program memory is loaded
beginning with the high addresses. For example, assume that eight 24-bit
words are loaded into the processor during the booting process. The first
word written into program memory is written to address 0x0007. The last
word loaded is written to internal program memory address 0x0000.
The boot address is made up of several values, as shown in Figures 10.18
and 10.19: the 3-bit page number (from BPAGE in the system control
register); the 8-bit page length, which is always read first (from the fourth
byte of the page); a 3-bit word counter value; and a 2-bit code whose value
determines which byte of the word is being addressed.
The last 24-bit word (instruction or data value) is loaded into the
processor first. The byte loading order is: upper byte, lower byte, middle
byte. The word pointer is then decremented. This addresses the second-to-
last 24-bit word in the EPROM.
For example, to boot from page 0 the shortest allowable page (with eight
24-bit words corresponding to a page length of 0), the following addresses
would be generated (see Figure 10.20):
1. The first address generated is 0x0003 which reads the page length.
2. The next address generated in this example is address 0x001C. This is
the upper byte of the last word.
3. The byte code is then updated to specify the lower byte (the final two
bits are 10) and the address generated is 0x001E.
4. The byte address changes again, this time to address the middle byte
(the two bit code is 01) and the address generated is 0x001D.
5. Once all three bytes are loaded, the word counter is decremented. The
three succeeding byte addresses generated are 0x0018, 0x001A, and
0x0019.
6. The word counter is decremented again and the next set of byte
addresses generated is 0x0014, 0x0016, and 0x0015. This process
continues until word 0 is loaded.
The contents of the EPROM, the byte addresses, and the order of
addresses generated is shown in Figure 10.20.
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