Analog Devices adsp-2100 Manual page 463

Control/Status Registers
Memory-Mapped Registers
15 14 13 12 11
0 1 1 1 1
DWAIT4
or
DWAIT
(ADSP-2181) (ADSP-2181)
ROM Enable (ADSP-2172, ADSP-21msp59)
1 = enable
0 = disable
15 14 13 12 11
0 0 0 0 0
Default bit values at reset are shown; if no value is shown, the bit is undefined at reset.
Reserved bits are shown on a gray field—these bits should always be written with zeros.
Waitstate Control Register
10 9 8 7
1 1 1 1
DWAIT3 DWAIT2
or or
IOWAIT3 IOWAIT2
(ADSP-2181)
Timer Registers
10 9 8 7
TPERIOD Period Register
TCOUNT Counter Register
TSCALE Scaling Register
0 0 0
6 5 4 3 2
1 1 1 1 1
DWAIT1 DWAIT0
or
IOWAIT1 IOWAIT0
(ADSP-2181) (ADSP-2181)
6 5 4 3 2
E
1 0
1 1
DM(0x3FFE)
or
1 0
DM(0x3FFD)
DM(0x3FFC)
DM(0x3FFB)
E – 3