Loop Comparator & Stack - Analog Devices adsp-2100 Manual

Program Control 3
The counter may also be tested and automatically decremented by a
conditional jump instruction that tests CE. The counter is not decremented
when CE is checked as part of a conditional return or conditional
arithmetic instruction.
The counter may be read directly over the DMD bus at any time without
affecting its contents. When reading the counter, the upper two bits of the
DMD bus are padded with zeroes.
The count stack is a 14-bit by 4-word stack which allows nesting of loops
by storing temporarily dormant loop counts. When a new value is loaded
into the counter from the DMD bus, the current counter value is
automatically pushed onto the count stack. The count stack is
automatically popped whenever the CE status is tested and is true,
thereby resuming execution of the outer loop (if any). The count stack may
also be popped manually if an early exit from a loop is taken.
There are two exceptions to the automatic pushing of the count stack. A
counter load from the DMD bus does not cause a count stack push if there
is no valid value in the counter, because a stack location would be wasted
on the invalid counter value. There is no valid value in the counter after a
system reset and also after the CE condition is tested when the count stack
is empty. The count stack empty status bit in the SSTAT register indicates
when the stack is empty.
The second exception is provided explicitly by the special purpose syntax
OWRCNTR (overwrite counter). Writing a value to OWRCNTR
overwrites the counter with the new value, and nothing is pushed onto
the count stack. OWRCNTR cannot be read (i.e. used as a source register),
and must not be written in the last instruction of a DO UNTIL loop.
3.2.4 Loop Comparator & Stack
The DO UNTIL instruction initiates a zero-overhead loop using the loop
comparator and loop stack of the program sequencer.
On every processor cycle, the loop comparator compares the next address
generated by the program sequencer to the address of the last instruction
of the loop (which is embedded in the DO UNTIL instruction). The
address of the first instruction in the loop is maintained on the top of the
PC stack. When the last instruction in the loop is executed the processor
conditionally jumps to the beginning of the loop, eliminating the
branching overhead otherwise incurred in loop execution.
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