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DMD BUS
REGISTER
COMPARE
MUX
SE
REGISTER
8
From
INSTRUCTION
Figure 2.9 Shifter Block Diagram
Any of the SI, SE or SR registers can be read and written in the same cycle.
Registers are read at the beginning of the cycle and written at the end of
the cycle. All register reads, therefore, read values loaded at the end of a
previous cycle. A new value written to a register cannot be read out until a
subsequent cycle. This allows an input register to provide an operand to
the shifter at the beginning of the cycle and be updated with the next
operand at the end of the same cycle. It also allows a result register to be
stored in memory and updated with a new result in the same cycle. See
the discussion of "Multifunction Instructions" in Chapter 15, "Instruction
Set Reference" for an illustration of this same-cycle read and write.
Computational Units
16
MUX
SB
EXPONENT
DETECTOR
HI / LO
8
32
MUX
NEGATE
REGISTER
R - BUS
SI
REGISTER
MUX
SS
X
I
X
SHIFTER
R
ARRAY
C
O
32
OR / PASS
16
16
MUX
MUX
SR1
SR0
REGISTER
16
16
16
2
MUX
2 – 23
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