Analog Devices adsp-2100 Manual page 151

Host Interface Port
Boot
Control
16
HMASK
SOFT RESET
2
HIP
INTERRUPTS
Figure 7.1 HIP Block Diagram
The HSR registers are shown in Figure 7.2, which can be found on the
following page. Status information in HSR6 and HSR7 shows which HDRs
have been written. The lower byte of HSR6 shows which HDRs have been
written by the host computer. The upper byte of the HSR6 shows which
HDRs have been written by the ADSP-21xx. When an HDR register is
read, the corresponding HSR bit is cleared.
HSIZE
BMODE
HMD1
HMD0
HACK
Host
HSEL
Control
HWR/HDS
Interface
HRD/HRW
HA2/ALE
2
HA1-0
Overwrite Bit
Read/write control
HDR0
HDR1
HDR2
HDR3
HDR4
HDR5
HSR6
HSR7
16
HD15-0
7
7 –
5