Bdma Port Functional Description; Bdma Control Registers - Analog Devices adsp-2100 Manual

11 DMA Ports
11.2.1
The BDMA Port lets you load (and store) program instructions and data
from (and to) byte memory with very low processor overhead. While the
ADSP-2181 is executing program instructions, the BDMA port reads (or
writes) code or data from (or to) byte memory—stealing one ADSP-2181
cycle per word when it needs to write to (or read from) internal memory.
You can calculate BDMA transfer time from the formula:
Number
of PM
or DM
Words
If, for example, you wanted to transfer 100 24-bit program memory words
through the BDMA port, assuming five waitstates and no hold offs, the
operation would take 1900 cycles. This is shown in the following equation:
100
PM
Words
Hold offs for DMA transfers are defined in the section "DMA Cycle
Stealing, DMA Hold Offs, and
chapter.
11.2.2
A set of memory-mapped registers are used to setup and control transfers
through the BDMA port. Figures 11.2 through 11.6 show these registers.
The BDMA Internal Address Register (BIAD) lets you set the 14-bit
internal memory starting address for a BDMA transfer. The BDMA
External Address Register (BEAD) lets you set the 14-bit external memory
starting address for a BDMA transfer.
11 – 4

BDMA Port Functional Description

Number Number
of Bytes of Added
per Word Waitstates
per Byte
3 5
Bytes Added
per Waitstates
Word per Byte

BDMA Control Registers

1
Cycle
+ +
for
Transfer
1
Cycle
+ +
for
Transfer
IACK
Acknowledge" at the end of this
1
Cycle for Hold
+
Internal Offs
RD/WR
1
Cycle for Hold
+
Internal Offs
RD/WR
0