Data Memory Read (Indirect Address) - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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15

DATA MEMORY READ (Indirect Address)

Syntax:
Permissible dregs
AX0
AX1
AY0
AY1
AR
Example:
Description:
contents of the data memory location to the destination register. The
addressing mode is register indirect with post-modify. For linear (i.e.
non-circular) indirect addressing, the L register corresponding to the I
register used must be set to zero. The contents of the source are always
right-justified in the destination register after the read (bit 0 maps to bit 0).
Status Generated: None affected.
Instruction Format:
ALU / MAC Operation with Data Memory Read, Instruction Type 4:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
1
AMF specifies the ALU or MAC operation to be performed in parallel
with the Data Memory Read. In this case, AMF = 00000, indicating a no-
operation for the ALU/MAC function.
DREG selects the destination Data Register . One of the 16 Data Registers
is selected according to the DREG Selection Table (see Appendix A).
G specifies which Data Address Generator the I and M registers are
selected from. These registers must be from the same DAG as separated
by the gray bar above. I specifies the indirect address pointer (I register).
M specifies the modify register (M register).
15 – 68
dreg = DM (
MX0
SI
MX1
SE
MY0
SR1
MY1
SR0
MR2
MR1
MR0
AY0 = DM (I3, M1);
The Data Memory Read Indirect instruction moves the
1
G
0
0
AMF
I0
,
M0
) ;
I1
M1
I2
M2
I3
M3
I4
M4
I5
M5
I6
M6
I7
M7
0
0
0 0 0
DREG
I
M

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