Analog Devices adsp-2100 Manual page 286

{code starts here}
{load interrupt vector addresses}
C
{initializations}
restarter:
D
clear:
{set up memory-mapped control registers}
E
mainloop:
.ENDMOD;
Listing 12.1 Program Example Listing (Setup & Main Loop Routine)
Programming Model
JUMP restarter; NOP; NOP; NOP;
RTI; NOP; NOP; NOP;
RTI; NOP; NOP; NOP;
RTI; NOP; NOP; NOP;
RTI; NOP; NOP; NOP;
JUMP fir_start; NOP; NOP; NOP;
RTI; NOP; NOP; NOP;
RTI; NOP; NOP; NOP;
RTI; NOP; NOP; NOP;
L0=%data_buffer;
L4=%coefficient;
M0=1;
M4=1;
I0=^data_buffer;
I4=^coefficient;
CNTR=%data_buffer;
DO clear UNTIL CE;
DM(I0,M0)=0;
AX0=191;
DM(0x3FF4)=AX0;
AX0=3;
DM(0x3FF5)=AX0;
AX0=0x69B7;
DM(0x3FF6)=AX0;
AX0=0x7000;
DM(0x3FFE)=AX0;
AX0=0x1000;
DM(0x3FFF)=AX0;
ICNTL = 0x00;
IMASK = 0x0018;
IDLE;
JUMP mainloop;
{restart interrupt}
{IRQ2 interrupt}
{HIP write interrupt}
{HIP read interrupt}
{SPORT0 transmit int}
{SPORT0 receive int}
{SPORT1 transmit int}
{SPORT1 receive int}
{TIMER interrupt}
{setup circular buffer length}
{setup circular buffer length}
{modify=1 for increment through buffers}
{point to data start}
{point to coeff start}
{clear data buffer}
{set up divide value for 8KHz RFS}
{1.536MHz internal serial clock}
{multichannel disabled}
{internally generated serial clock}
{receive frame sync required}
{receive width 0}
{transmit frame sync required}
{transmit width 0}
{int transmit frame sync disabled}
{int receive frame sync enabled}
{u-law companding}
{8 bit words}
{DM wait states: }
{ 0x3400-0x37FF 7 waits}
{ all else 0 waits}
{SPORT0 enabled}
{boot from boot page 0}
{0 PM waits}
{0 boot memory waits}
{enable SPORT0 interrupt only}
{wait for interrupt}
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