Analog Devices adsp-2100 Manual page 193

Adsp-2100 family programmable single-chip microprocessors
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9
System Interface
FO (SPORT1 only)
CLKODIS
BIASRND
Host Interface Port Registers (memory-mapped)
HDR0-5
HSR6
HSR7
HMASK
Table 9.5 ADSP-2171 State After Reset Or Software Reboot
Control Field
Bus Exchange Register
PX
Status Registers
IMASK
ASTAT
MSTAT
SSTAT
ICNTL
IFC
Control Registers (memory-mapped)
BWAIT
BPAGE
SPORT1 configure
SPE0
SPE1
DWAIT0–4
PWAIT
TCOUNT
TPERIOD
TSCALE
PDFORCE
PUCR
XTALDIS
XTALDELAY
Table 9.6 ADSP-2181 State After Reset Or Software Reboot (cont. on next page)
9 – 10
Flag Out value
CLKOUT disable
MAC biased rounding
HIP data registers
HIP status register
HIP status register
HIP interrupt enables
Description
PX register
Interrupt service enables
Arithmetic status
Mode status
Stack status
Interrupt control
Interrupt force/clear
Boot memory wait states
Boot page
Configuration
SPORT0 enable
SPORT1 enable
Data memory wait states
Program memory wait
Timer count register
Timer period register
Timer scale register
Powerdown force
Powerup context reset
XTAL pindrive disable
during powerdown
Delay startup from powerdown
(4096 cycles)
undefined
unchanged
0
unchanged
0
unchanged
undefined
used during HIP reboot
0x0000
used during HIP reboot
0x0080
unchanged
0
unchanged
Reset
Reboot
undefined
undefined
0
0
0
0
0
unchanged
0x55
0x55
undefined
unchanged
0
0
3
unchanged
0
unchanged
1
unchanged
0
unchanged
0
unchanged
7
unchanged
7
unchanged
undefined
operates during reboot
undefined
unchanged
undefined
unchanged
0
unchanged
0
unchanged
0
unchanged
0
unchanged

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