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load of a non-data register with immediate data or register-to-register
move (instruction types 3, 7 and 17). For example, the following
instruction would ready SPORT1 to transmit a serial value, assuming
SPORT1 is configured and enabled:
TX1 = AX0;
The following instruction would access a serial value received on SPORT0:
AY0 = RX0;
Because the SPORTs are interrupt driven, these instructions would
typically be executed within a interrupt service routine in response to a
SPORT interrupt.
5.4
SPORTs are enabled through bits in the system control register. This
register is mapped to data memory address 0x3FFF. Bit 12 enables
SPORT0 if it is a 1, and bit 11 enables SPORT1 if it is a 1. Both of these bits
15
14
13
12
11
Figure 5.2 SPORT Enables In The System Control Register
Serial Ports
{the contents of AX0 are transmitted}
{on SPORT1}
{the contents of SPORT0 receive register}
{is transferred to AY0}
System Control Register
0x3FFF
10
9
8
7
6
SPORT1 Configure
1 = serial port, 0 = FI, FO, IRQ0, IRQ1, SCLK
SPORT1 Enable
1 = enabled, 0 = disabled
SPORT0 Enable
1 = enabled, 0 = disabled
SPORT ENABLE
5
4
3
2
1
0
5
5 – 7
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