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9
System Interface
Pin
Direction
SCLK1
SCLK1
TFS1/IRQ1
TFS1
RFS1/IRQ0
RFS1
DR1/FLAGIN
DT1/FLAGOUT
FL<2:0>
PF<7:0>
BMODE
IRD
IWR
IS
IAL
IAD
IACK
HSIZE
HMD0
HMD1
HSEL
HRD
HWR
HADR<2:0>
HDATA<15:0>
HDATA<15:0>
HACK
VIN (NORM)
VIN (AUX)
VFB (NORM)
VFB (AUX)
VOUTP
VOUTN
VREF
Table 9.9 Pin States During Powerdown
9 – 28
State During Powerdown
I
Active
O
Driven to a static level if internal, high impedance otherwise
I
Active if SPORT 1 is enabled or configured alternate (IRQ1)
O
Driven if SPORT 1 is enabled and configured for internal transmit framing,
high impedance otherwise
I
Active if SPORT 1 is enabled or configured alternate (IRQ0)
O
Driven if SPORT 1 is enabled and configured for internal receive framing,
high impedance otherwise
I
Active if SPORT 1 is enabled or configured alternate (FLAGIN)
O
Driven if serial port operating. Output may be static or changing depending
upon serial clock. Driven if SPORT 1 is enabled or configured alternate
(FLAGOUT)
O
Driven to previous value
I/O
(ADSP-2181) Active
I
Active
I
(ADSP-2181) Active, if IS asserted
I
(ADSP-2181) Active, if IS asserted
I
(ADSP-2181) Active
I
(ADSP-2181) Active, if IS asserted
I/O
(ADSP-2181) Active, if an operation in progress
O
(ADSP-2181) Active
I
(ADSP-2171, ADSP-21msp5x) Active
I
(ADSP-2171, ADSP-21msp5x) Active
I
(ADSP-2171, ADSP-21msp5x) Active
I
(ADSP-2171, ADSP-21msp5x) Active
I
(ADSP-2171, ADSP-21msp5x) Active
I
(ADSP-2171, ADSP-21msp5x) Active
I
(ADSP-2171, ADSP-21msp5x) Active
I
(ADSP-2171, ADSP-21msp5x) Active if host writing or HMD1 and
HA2/HALE HIGH, inactive otherwise
O
(ADSP-2171, ADSP-21msp5x) Driven if host reading, high impedance otherwise
O
(ADSP-2171, ADSP-21msp5x) Driven
I
(ADSP-21msp5x) Inactive, set analog powerdown bit
I
(ADSP-21msp5x) Inactive, set analog powerdown bit
O
(ADSP-21msp5x) Inactive, set analog powerdown bit
O
(ADSP-21msp5x) Inactive, set analog powerdown bit
O
(ADSP-21msp5x) Driven low in powerdown
O
(ADSP-21msp5x) Driven low in powerdown
O
(ADSP-21msp5x) Reference turned off
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