Logical Shift Immediate - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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SHIFTER
15

LOGICAL SHIFT IMMEDIATE

Syntax:
Permissible xops
SI
SR1
SR0
AR
Example:
Description:
direction specified by the constant in the exponent field. Positive constants
cause a left shift (upshift); negative constants cause a right shift
(downshift). A positive constant must be entered without a "+" sign.
The shift may be referenced to the upper half of the output field (HI
option) or to the lower half (LO option). The shift output may be logically
ORed with the contents of the SR register by selecting the SR OR option.
For LSHIFT with a positive shift constant, the operand is shifted left. The
32-bit output field is zero-filled to the left and from the right. Bits shifted
out of the high order bit in the 32-bit destination field (SR
For LSHIFT with a negative shift constant, the operand is shifted right.
The 32-bit output field is zero-filled from the left and to the right. Bits
shifted out of the low order bit are dropped.
To shift a double precision number, the same shift constant is used for
both parts of the number. On the first cycle, the upper half of the number
is shifted using the HI option; on the following cycle, the lower half is
shifted using the LO and OR options.
* See Table 2.4 in Chapter 2.
Status Generated:
Instruction Format:
Shift Immediate Operation, Instruction Type 15:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
0
SF
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
15 – 62
SR = [SR OR] LSHIFT xop BY <exp>
<exp>
MR0
Any constant between –128 and 127*
MR1
MR2
SR = LSHIFT SR1 BY –6 (HI) ;
Logically shifts the bits of the operand by the amount and
None affected.
0
0
1
1
1
1
Shifter Function
LSHIFT (HI)
LSHIFT (HI, OR)
LSHIFT (LO)
LSHIFT (LO, OR)
0
SF
Xop
Xop: Shifter Operand
<exp>: 8-bit signed shift value
(HI)
;
(LO)
) are dropped.
31
<exp>

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