Logical Shift - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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SHIFTER
15

LOGICAL SHIFT

Syntax:
Permissible xops
SI
SR1
SR0
Example:
Description:
designated logical shift. If the condition is not true then perform a no-
operation. Omitting the condition performs the shift unconditionally. The
operation logically shifts the bits of the operand by the amount and
direction specified in the Shift Code from the SE register. Positive Shift
Codes cause a left shift (upshift) and negative Codes cause a right shift
(downshift).
The shift may be referenced to the upper half of the output field (HI
option) or to the lower half (LO option). The shift output may be logically
ORed with the present contents of the SR register by selecting the SR OR
option.
For LSHIFT with a positive Shift Code, the operand is shifted left; the
numbers of positions shifted is the count in the Shift Code. The 32-bit
output field is zero-filled from the right. Bits shifted out of the high order
bit in the 32-bit destination field (SR
For LSHIFT with a negative Shift Code, the operand is shifted right; the
number of positions shifted is the count in the Shift Code. The 32-bit
output field is zero-filled from the left. Bits shifted out of the low order bit
in the destination field (SR
To shift a double precision number, the same Shift Code is used for both
halves of the number. On the first cycle, the upper half of the number is
shifted using the HI option; on the following cycle, the lower half of the
number is shifted using the LO and OR options.
Status Generated:
15 – 52
[ IF cond ] SR = [SR OR] LSHIFT xop
Permissible conds (see Table 15.9)
AR
EQ
MR2
NE
MR1
GT
MR0
GE
LT
IF GE SR = LSHIFT SI (HI) ;
Test the optional condition and, if true, then perform the
) are dropped.
0
None affected.
LE
AC
NEG
NOT AC
POS
MV
AV
NOT MV
NOT AV
NOT CE
) are dropped.
31
(HI)
;
(LO)

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