Sport Configuration - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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The configuration section is a block of control registers (mapped to data
memory) that the program must initialize before using the SPORTs. The
data section is a register file used to transmit and receive values through
the SPORT.
5.3.1

SPORT Configuration

SPORT configuration is accomplished by setting bit and field values in
configuration registers. These registers are memory mapped in data
memory space. SPORT0 configuration registers occupy locations 0x3FF3
to 0x3FFA; SPORT1 configuration registers occupy locations 0x3FEF to
0x3FF2. The contents of these registers are summarized in Table 5.3 and in
the register summary in Appendix E. The effects of the various settings
are described at length in the sections that follow.
Address
Contents
0x3FFA
SPORT0* multichannel receive word enables (31-16)
0x3FF9
SPORT0* multichannel receive word enables (15-0)
0x3FF8
SPORT0* multichannel transmit word enables (31-16)
0x3FF7
SPORT0* multichannel transmit word enables (15-0)
0x3FF6
SPORT0* control register
Multichannel mode controls
Serial clock source
Frame synchronization controls
Companding mode
Serial word length
0x3FF5
SPORT0* serial clock divide modulus (determines frequency)
0x3FF4
SPORT0* receive frame sync divide modulus (determines frequency)
0x3FF3
SPORT0* autobuffer control register
0x3FF2
SPORT1 control register
Flag output value
Serial clock source
Frame synchronization controls
Companding mode
Serial word length
0x3FF1
SPORT1 serial clock divide modulus (determines frequency)
0x3FF0
SPORT1 receive frame sync divide modulus (determines frequency)
0x3FEF
SPORT1 autobuffer control register (not on ADSP-21msp58/59)
*SPORT0 configuration registers are defined only on processors that have both SPORT0 and SPORT1
Table 5.3 SPORT Configuration Registers
There are two ways to initialize or to change values in SPORT
Serial Ports
5
5 – 5

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