Table 239. Usart / Lpuart Features - ST STM32WL55JC Reference Manual

RM0453
to control peripherals featuring shift registers (e.g. LCD drivers). The clock phase and
polarity are software programmable.
In Smartcard mode, CK output provides the clock to the smartcard.
•
NSS
This pin acts as Slave Select input in Synchronous slave mode.
Note: NSS and CTS share the same pin.
35.5.3 USART character description
The word length can be set to 7, 8 or 9 bits, by programming the M bits (M0: bit 12 and M1:
bit 28) in the USART_CR1 register (see
•
7-bit character length: M[1:0] = '10'
• 8-bit character length: M[1:0] = '00'
•
9-bit character length: M[1:0] = '01'
Note: In 7-bit data length mode, the Smartcard mode, LIN master mode and Auto baud rate (0x7F
and 0x55 frames detection) are not supported.
By default, the signal (TX or RX) is in low state during the start bit. It is in high state during
the stop bit.
These values can be inverted, separately for each signal, through polarity configuration
control.
An Idle character is interpreted as an entire frame of "1"s (the number of "1"s includes the
number of stop bits).
A Break character is interpreted on receiving "0"s for a frame period. At the end of the
break frame, the transmitter inserts 2 stop bits.
Transmission and reception are driven by a common baud rate generator. The transmission
and reception clock are generated when the enable bit is set for the transmitter and receiver,
respectively.
A detailed description of each block is given below.
Universal synchronous/asynchronous receiver transmitter (USART/UART)
RM0453 Rev 2
Figure 306):
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