ST STM32WL55JC Reference Manual page 1120

Universal synchronous/asynchronous receiver transmitter (USART/UART)
35.3 USART extended features
• LIN master synchronous break send capability and LIN slave break detection capability
–
•
IrDA SIR encoder decoder supporting 3/16 bit duration for normal mode
•
Smartcard mode
–
–
•
Support for Modbus communication
–
–
35.4 USART implementation
The table below describes USART implementation on STM32WL5x devices. It also includes
LPUART for comparison.
Hardware flow control for modem
Continuous communication using DMA
Multiprocessor communication
Synchronous mode (Master/Slave)
Smartcard mode
Single-wire Half-duplex communication
IrDA SIR ENDEC block
LIN mode
Dual clock domain and wakeup from low-power mode
Receiver timeout interrupt
Modbus communication
Auto baud rate detection
Driver Enable
USART data length
Tx/Rx FIFO
Tx/Rx FIFO size
Wakeup from Stop mode
1. X = supported.
2. Wakeup supported from Stop 0 and Stop 1 modes.
1120/1454
13-bit break generation and 10/11 bit break detection when USART is hardware
configured for LIN
Supports the T 0 and T
=
the ISO/IEC 7816-3 standard
0.5 and 1.5 stop bits for Smartcard operation
Timeout feature
CR/LF character recognition
Table 239. USART / LPUART features
USART / LPUART modes/features
1 asynchronous protocols for smartcards as defined in
=
(1)
RM0453 Rev 2
USART1/2 LPUART1
X
X
X
X
X
X
X
X
X
X
X
X
X
7, 8 and 9 bits
X
8
(2)
X X
RM0453
X
X
X
-
-
X
-
-
X
-
-
-
X
X
(3)