General Control Register 20 (Gcn20) - Fujitsu FR60 Hardware Manual

CHAPTER 7 PPG TIMER
7.3.6

General Control Register 20 (GCN20)

The GCN20 activates a start trigger through software.
■ Bit Configuration of General Control Register 20 (GCN20)
The bit configuration of the GCN20 is shown below.
Figure 7.3-7 Bit Configuration of General Control Register 20 (GCN20)
Address: 00011B
When one of the EN-bits of this register is selected by the GCN10, the register value is passed
to the trigger input of the PPG timer.
The PPG timers of multiple channels can be activated at the same time by generating the edge
selected by the EGS1 and EGS0 bits of the control status register (PCNH, PCNL) via software.
Bit7 to bit4 of this register must be set to "0".
Bit7 to bit0 of address 00011A
296
bit 7 6 5
- - -
H
R/W R/W R/W
0 0 0
H
4 3 2 1
- EN3 EN2 EN1
R/W R/W R/W R/W
0 0 0 0
must be set to "0".
0
EN0
←Attribute
R/W
←Initial value
0