Fujitsu FR60 Hardware Manual page 561

32-bit microcontroller mb91301 series
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Table A-1 I/O Map (5 / 11)
Address
+0
000304
H
000308
H
to
0003E0
H
0003E4
H
0003E8
H
to
0003EF
H
0003F0
H
0003F4
H
0003F8
H
0003FC
H
DDRG [R/W] B
000400
H
00000000
000404
H
to
00040C
H
PFRG [R/W] B
000410
H
00------
000414
H
to
00041C
H
PCRG [R/W]
2
000420
B*
H
00000000
000424
H
to
00043C
H
Register
+1
BSD0
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BSD1
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BSDC
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BSRR
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DDRH [R/W] B
-----000
PFRH [R/W] B
------0-
PCRH [R/W] B
-----000
+2
ISIZE [R/W]
------10
ICHCR [R/W]
0-000000
[W] W
[R/W] W
[W] W
[R] W
DDRJ [R/W] B
00000000
PFRJ [R/W] B
--00-00-
PCRJ [R/W]
00000000
APPENDIX A I/O MAP
Block
+3
B,H,W
I-Cache
Reserved
B,H,W
I-Cache
Reserved
Bit Search Module
R-bus
Data Direction
Register
Reserved
R-bus
Port Function
Register
Reserved
R-bus
2
B *
pull-up resistor control
Register
Reserved
541

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