Fujitsu FR60 Hardware Manual page 632

INDEX
Software Reset
Software Reset (STCR: SRST Bit Writing)........... 96
Source Clock
Source Clock ................................................... 103
Specifications
Overview of Specifications ................................. 51
SRST
Software Reset (STCR: SRST Bit Writing)........... 96
SSP
System Stack Pointer (SSP)........................... 64, 83
SSR
Bit Configuration of Serial Status Register
(SSR) ................................................. 369
Detailed Bit of Serial Status Register (SSR)........ 369
Stack
Allocation of a Stack to a Little Endian Area ...... 567
Interrupt Stack ................................................... 83
Standby Control Register
Standby Control Register (STCR) ...................... 112
Standby Mode
Return from Standby Mode (Sleep/Stop) ............ 342
Startup Routine
Startup Routine ................................................ 521
State Transition Requests
Priority of State Transition Requests .................. 135
STCR
Software Reset (STCR: SRST Bit Writing)........... 96
Standby Control Register (STCR) ...................... 112
Step Trace Trap
Operation of Step Trace Trap .............................. 92
Stop Conversion Mode
Stop Conversion Mode ..................................... 357
Stop Mode
Stop Mode ....................................................... 138
STOP state
Return Operation from STOP State .................... 324
Stop State
Stop State ........................................................ 133
Stopping
Operation End/Stopping.................................... 423
Stopping due to an Error ................................... 423
String Arrangement
Operations other than the String Arrangement Using a
String Manipulation Function ............... 566
String Manipulation Function
Operations other than the String Arrangement Using a
String Manipulation Function ............... 566
Specification of the -K lib Option When Using a String
Manipulation Function......................... 567
Structure Assignment
Structure Assignment........................................ 565
Subtract Instructions
Add-Subtract Instructions.................................. 579
612
Successive Accesses
Basic Timing (For Successive Accesses) ............ 203
Synchronous Reset
Synchronous Reset Operation ........................... 101
Synchronous Write Enable Output
Operation Timing for Synchronous Write Enable
Output ............................................... 210
System Calls
Contained System Calls .................................... 518
System Stack Pointer
System Stack Pointer (SSP) .......................... 64, 83
T
Table Base Register
Table Base Register (TBR) ........................... 64, 84
Target Board
Configuration Example :Target Board + Evaluation
Chip + ICE......................................... 534
TBCR
Time Base Counter Control Register
(TBCR).............................................. 115
TBR
Table Base Register (TBR) ........................... 64, 84
TCCS
Timer Control Status Register (TCCS) ............... 482
TCDT
Timer Data Register (TCDT) ............................ 481
TCR
Configuration of the Pin/Timing Control Register
(TCR) ................................................ 175
Functions of Bits in the Pin/Timing Control Register
(TCR) ................................................ 175
Temporary Stopping
Temporary Stopping......................................... 422
Time Base Counter
Time Base Counter .......................................... 125
Time Base Counter Clear Register
Time Base Counter Clear Register (CTBR) ........ 117
Time Base Counter Control Register
Time Base Counter Control Register
(TBCR).............................................. 115
Time-base Timer
Time-base Timer.............................................. 126
Timer Control Status Register
Timer Control Status Register (TCCS) ............... 482
Timer Data Register
Timer Data Register (TCDT) ............................ 481
Timer Register
Bit Configuration of the 16-bit Timer Register
(TMR:TMR2 to TMR0) ...................... 275
Timing Chart
Interrupt Sources and Timing Chart (PPG Output:
Normal Polarity) ................................. 301