CHAPTER 4 EXTERNAL BUS INTERFACE
4.4.1
Big Endian Bus Access
With the exception of the CS0 area of the FR family, either the big endian method or
the little endian method can be selected for each chip select area. If "0" is set for the
LEND bit of the ACR register, the area is treated as big endian. The FR family is
normally big endian and performs external bus access.
■ Data Format
The relationship between the internal register and the external data bus is as follows:
❍ Word access (when LD/ST instruction executed)
Figure 4.4-4 Relationship between Internal Register and External Data Bus for Word Access
❍ Halfword access (LDUH/STH instruction executed)
Figure 4.4-5 Relationship between the Internal Register and External Data Bus for Halfword Access
D31
D23
D15
184
Internal register
D31
AA
D23
BB
D15
CC
D7
DD
D0
a) Output address low-order
digits "00
"
B
Internal register External bus
D31
AA
D23
BB
D15
AA
D7
D7
BB
D0
D0
External register
D31
AA
D23
BB
D15
CC
D7
DD
D0
b) Output address low-order
digits "10
"
B
Internal register External bus
D31
D23
D15
AA
AA
D7
BB
BB
D0
D31
D23
D15
D7
D0