Fujitsu FR60 Hardware Manual page 360

CHAPTER 11 INTERRUPT CONTROLLER
Table 11.3-1 Relationship between Interrupt Sources, Interrupt Numbers, and Interrupt Levels (4 / 4)
Interrupt source
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Used in INT instruction
■ NMI
An NMI (Non Maskable Interrupt) has the highest priority among the interrupt sources handled
by the interrupt controller. Thus, an NMI is always selected if it occurs at the same time as other
interrupt sources.
• If an NMI occurs, the following information is reported to the CPU:
- Interrupt level:15 (01111
- Interrupt number:15 (0001111
• Detecting an NMI
The external interrupt and NMI module sets and detects an NMI. This module only generates
an interrupt level, interrupt number, and MHALTI in response to an NMI request.
• Preventing a DMA transfer occurring due to an NMI
If an NMI request occurs, the MHALTI bit of the HRCL register is set to "1" to prevent DMA
transfer. To clear the state preventing DMA transfer, clear the MHALTI bit to "0" at the end of
the NMI routine.
340
Interrupt number
Decimal Hexadecimal
71 47
72 48
73 49
74 4A
75 4B
76 4C
77 4D
78 4E
79 4F
80 to 255 50 to FF
)
B
)
B
Interrupt
Offset address of
level
−
2E0 000FFEE0
H
−
2DC 000FFEDC
H
−
2D8 000FFED8
H
−
2D4 000FFED4
H
−
2D0 000FFED0
H
−
2CC 000FFECC
H
−
2C8 000FFEC8
H
−
2C4 000FFEC4
H
−
2C0 000FFEC0
H
2BC 000FFEBC
H
−
to
000 000FFC00
H
Default
RN
TBR
−
H
−
H
−
H
−
H
−
H
−
H
−
H
−
H
−
H
H
−
to
H