Fujitsu FR60 Hardware Manual page 580

APPENDIX C PIN STATE IN EACH CPU STATE
Table C-3 Pin States in External Bus 8-Bit Mode (2 / 3)
Specified
Port
Pin no. function
name
name
P40 to
45 to 52 A00 to A07
P47
P50 to
55 to 62 A08 to A15
P57
P60 to
64 to 67 A16 to A19
P63
68 P64 A20/SDA0*
69 P65 A21/SCL0*
70 P66 A22/SDA1*
71 P67 A23/SCL1*
76 to 79 - AN0 to AN3 AN0 to AN3 AN0 to AN3
81 PG0 INT0/ICU0*
82 PG1 INT1/ICU1*
83 PG2 INT2/ICU2*
84 PG3 INT3/ICU3*
INT4/ATG/
85 PG4
FRCK*
86 PG5 INT5/SIN2
87 PG6 INT6/SOT2
88 PG7 INT7/SCK2
90 PJ0 SIN0
91 PJ1 SOT0
92 PJ2 SCK0
93 PJ3 SIN1
94 PJ4 SOT1
95 PJ5 SCK1
96 PJ6 PPG0
97 PJ7 TRG0
98 PH0 TIN0
99 PH1 TIN1/PPG3
100 PH2 TIN2/TRG3
103 PB0 DREQ0
104 PB1 DACK0
105 PB2 DEOP0
106 PB3 DREQ1
DACK1/
107 PB4
TRG1
108 PB5 DEOP1/PPG1
109 PB6 IOWR
110 PB7 IORD
560
At initialization (INIT)
Function
Function
name
name
Initial
value
Bus width Bus width
32 bits 8 bits
A00 to A07 A00 to A07
A08 to A15 A08 to A15
A16 to A19 A16 to A19
FF output
A20 A20
A21 A21
A22 A22
A23 A23
invalid
PG0 PG0
PG1 PG1
PG2 PG2
PG3 PG3
Output Hi-Z
Input ready
PG4 PG4
PG5 PG5
PG6 PG6
PG7 PG7
PJ0 PJ0
PJ1 PJ1
PJ2 PJ2
PJ3 PJ3
Output Hi-Z
PJ4 PJ4 Input ready
PJ5 PJ5
PJ6 PJ6
PJ7 PJ7
PH0 PH0
Output Hi-Z
PH1 PH1
Input ready
PH2 PH2
PB0 PB0
PB1 PB1
PB2 PB2
PB3 PB3
Output
PB4 PB4
Input ready
PB5 PB5
PB6 PB6
PB7 PB7
Stop mode
Sleep
mode
HIZ=0
P : Previous
The same as
state held
F : Address stated left
output
Input Previous state Input
held invalid
P : Previous P : Previous
state held state held
F : Normal F : Input
operation ready
P : Previous
Previous
state held
F : Normal state held
operation
P : Previous
Previous
state held
F : Normal state held
operation
P : Previous
Previous
state held
Hi-Z
F : Normal state held
operation
Bus open
(BGRNT)
HIZ=1
CS CS not
shared shared
Output
Output
Hi-Z/input Output Hi-Z
Hi-Z
0 fixed
Input Previous Previous
invalid state held state held
P : Output
Hi-Z Normal Normal
F : Input operation operation
ready
Output
Hi-Z/ Normal Normal
operation operation
input 0
fixed
Output
Hi-Z/ Normal Normal
operation operation
input 0
fixed
Output
Hi-Z/ Normal Normal
operation operation
input 0
fixed