Reset Operation Modes - Fujitsu FR60 Hardware Manual

3.11.5 Reset Operation Modes

Two modes for an operation initialization reset (RST) are provided: normal
(asynchronous) reset mode and synchronous reset mode. The operation initialization
reset mode is selected with bit7 (SYNCR bit) of the time base counter control register
(TBCR). This mode setting is initialized only by a settings initialization reset (INIT). A
settings initialization reset always results in an asynchronous reset.
This section describes the operation of these modes.
■ Normal Reset Operation
Normal reset operation refers to entering the operation initialization reset (RST) state
immediately after an operation initialization reset (RST) request occurs.
If, in this mode, a reset (RST) request is accepted, the device immediately enters the reset
(RST) state regardless of the operating state of the internal bus.
In this mode, the result of bus access performed prior to each status transition is not
guaranteed. However, these requests can certainly be accepted.
If bit7 (SYNCR bit) of the time base counter control register (TBCR) is set to "0", normal reset
mode is selected. The initial value after a settings initialization reset (INIT) is normal reset mode.
■ Synchronous Reset Operation
Synchronous reset operation refers to entering the operation initialization reset (RST) state after
all bus access has stopped when an operation initialization reset (RST) request occurs.
If, in this mode, a reset (RST) request is accepted, the device does not enter the reset (RST)
state while internal bus access is in progress.
If the above request is accepted, a sleep request is issued to the internal buses. If all the buses
stop and enter the sleep state, the device enters the operation initialization reset (RST) state.
In this mode, the result of all bus accesses is guaranteed because all bus access is stopped
prior to each status transition.
If bus access does not stop for some reason, no requests can be accepted while the bus access
is in progress. Even in this case, the settings initialization reset (INIT) is immediately valid.
Bus access may not stop in the following cases:
• A bus release request (BRQ) continues to be input to the external extended bus interface,
bus release acknowledge (BGRNT) is valid, and a new bus access request arrives from an
internal bus.
• A ready request (RDY) continues to be input to the external extended bus interface and bus
wait is valid. In the following cases, the device eventually enters another state but only after
a long time.
• When self-refreshing in sleep mode has been set with the SDRAM interface activated (State
transition does not occur until the self-refresh mode setting is completed.)
CHAPTER 3 CPU AND CONTROL UNITS
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