Fujitsu FR60 Hardware Manual page 472

2
CHAPTER 16 I C INTERFACE
❍ 7-bit slave address register (ISBA0/ISBA1)
Address: 00009B
❍ 7-bit slave address mask register (ISMK0/ISMK1)
Address: 00009A
❍ Data register (IDAR0/IDAR1)
Address: 00009D
❍ Clock control register (ICCR0/ICCR1)
Address: 00009E
❍ Clock disable register (IDBL0/IDBL1)
Address: 00009F
452
bit 7
/0000BB
-
H H
R R/W
Initial value => 0
bit 15
/0000BA
ENSB SM6
H H
R/W R/W
Initial value => 0
bit 7
/0000BD
D7
H H
R/W R/W
Initial value => 0
bit 15
/0000BE
TEST
H H
W
Initial value => 0
bit 7
/0000BF
-
H H
R
Initial value => 0
6 5 4 3
SA6 SA5 SA4 SA3
R/W R/W R/W
0 0 0 0
14 13 12 11
SM5 SM4 SM3
R/W R/W R/W
1 1 1 1
6 5 4 3
D6 D5 D4 D3
R/W R/W R/W
0 0 0 0
14 13 12 11
- EN CS4 CS3
R R/W R/W R/W
0 0 1 1
6 5 4 3
- - - -
R R R R
0 0 0 0
2 1 0
SA2 SA1 SA0
R/W R/W R/W
0 0 0
10 9 8
SM2 SM1 SM0
R/W R/W R/W
1 1 1
2 1 0
D2 D1 D0
R/W R/W R/W
0 0 0
10 9 8
CS2 CS1 CS0
R/W R/W R/W
1 1 1
2 1 0
- - DBL
R R R/W
0 0 0