Fujitsu FR60 Hardware Manual page 600

APPENDIX E INSTRUCTION LISTS
■ Logic Instructions
Table E.2-3 Logic Instructions
Mnemonic
AND Rj, Ri
AND Rj, @Ri*
ANDH Rj, @Ri*
ANDB Rj, @Ri*
OR Rj, Ri
OR Rj, @Ri*
ORH Rj, @Ri*
ORB Rj, @Ri*
EOR Rj, Ri
EOR Rj, @Ri*
EORH Rj, @Ri*
EORB Rj, @Ri*
*: To code these instructions in the assembler, set Rj to a general-purpose register other than R15.
580
Type OP CYCLE
A 82 1
A 84 1+2a
A 85 1+2a
A 86 1+2a
A 92 1
A 94 1+2a
A 95 1+2a
A 96 1+2a
A 9A 1
A 9C 1+2a
A 9D 1+2a
A 9E 1+2a
NZVC Operation
CC-- Ri &= Rj
CC-- (Ri) &= Rj
CC-- (Ri) &= Rj
CC-- (Ri) &= Rj
CC-- Ri | = Rj
CC-- (Ri) | = Rj
CC-- (Ri) | = Rj
CC-- (Ri) | = Rj
CC-- Ri ^ = Rj
CC-- (Ri) ^ = Rj
CC-- (Ri) ^ = Rj
CC-- (Ri) ^ = Rj
RMV Remarks
- Word
❍
Word
❍
Halfword
❍
Byte
- Word
❍
Word
❍
Halfword
❍
Byte
- Word
❍
Word
❍
Halfword
❍
Byte