Read -> Write Operation - Fujitsu FR60 Hardware Manual

CHAPTER 4 EXTERNAL BUS INTERFACE
4.5.3 Read -> Write Operation
This section shows the operating timing for read -> write.
■ Operation Timing of Read -> Write
Figure 4.5-3 shows the operation timing for (TYP3 to TYP0=0000
MCLK
A31 to A00
AS
CSn
RD
WRn
D31 to D00
• Setting of the W07/W06 bits of the AWR register enables 0 to 3 idle cycles to be inserted.
• Settings in the CS area on the read side are enabled.
• This idle cycle is inserted if the next access after a read access is write access or access to
another area.
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Figure 4.5-3 Timing Chart for Read -> Write
Read Idle
, AWR=0048
B
Write
).
H