Fujitsu FR60 Hardware Manual page 514

CHAPTER 18 INPUT CAPTURE
[bit5, bit4]: ICE3, ICE2, ICE1, and ICE0
These bits are used as input-capture interrupt permission bits. When these bits are set to "1"
and the interrupt flags (ICP3, ICP2, ICP1, and ICP0) are also set to "1", an input-capture
interrupt occurs.
ICEn
0
1
"n" in ICEn indicates the input capture channel number.
[bit3 to bit0]: EG31, EG30, EG21, EG20, EG11, EG10, EG01, and EG00
These bits are used to select the effective edge polarity of the external input. They are also
used to enable input capture operations.
EGn1
0
0
1
1
EGn1 and EGn0: n corresponds to the channel number of the input capture.
494
Input capture interrupt specification
Prohibits interrupts. (initial value)
Allows an interrupt.
EGn0
0 No edge is detected. (stop status) (initial value)
A rising edge is detected. ↑
1
A falling edge is detected. ↓
0
Both edges are detected. ↑ & ↓
1
Edge detection polarity