Fujitsu FR60 Hardware Manual page 391

[bit2] BDS (Bit Direction Select): Transfer direction selection
This bit is transfer direction selection bit.
Table 13.2-16 shows the transfer direction selection.
Table 13.2-16 Transfer Direction Selection
BDS
0
1
Note:
When the serial data register is read or written to data, the high-order and low-order sides are
exchanged with each other. If you update this bit after writing data to the SDR register, therefore,
the data is made invalid.
If "1" is written to the BDS bit and transmit data is written to the serial output data register (SODR)
at the same time after halfword access to the serial status register (SSR), the BDS bit setting for
transmit data is ignored.
To switch between the MSB/LSB transfer directions, set the BDS bit before writing data to the
SODR.
[bit1] RIE (Receiver Interrupt Enable): Receive interrupt
This bit controls a reception interrupt.
Table 13.2-17 shows the function for controlling the receive interrupt.
Table 13.2-17 Function for Controlling Receive Interrupt
RIE
Note:
Receive interrupt sources include errors due to PE, ORE, and FRE as well as normal receive due
to RDRF.
[bit0] TIE (Transmitter Interrupt Enable): Control send interrupt
This bit controls send interrupts.
Table 13.2-18 shows the function for controlling the send interrupt.
Table 13.2-18 Function for Controlling Send Interrupt
TIE
Transfer starting from the least significant bit. (LSB) [initial value]
Transfer starting from the most significant bit. (MSB)
0 Disables receive interrupts.
1 Enables receive interrupts.
0 Disables send interrupts.
1 Enables send interrupts.
Function
Function
[initial value]
Function
[initial value]
CHAPTER 13 UART
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