Control/Status Registers B (Dmacb0 To Dmacb4) - Fujitsu FR60 Hardware Manual

14.2.2 Control/Status Registers B (DMACB0 to DMACB4)

Control/status registers B (DMACB0 to DMACB4) control the operation of each DMAC
channel and exist independently for each channel.
This section describes the configuration of control/status registers B (DMACB0 to
DMACB4) and their functions.
■ Bit Configuration of Control/Status Registers B (DMACB0 to DMACB4)
Figure 14.2-3 shows the bit configuration of control/status registers B (DMACB0 to DMACB4).
Figure 14.2-3 Bit Configuration of Control/Status Registers B (DMACB0 to DMACB4)
bit 31
Address 000204 (ch.0)
H
00020C (ch.1)
H
000214 (ch.2)
H
00021C (ch.3) bit 15
H
000224 (ch.4)
H
■ Detailed Bit of Control/Status Registers B (DMACB0 to DMACB4)
The following describes the functions of the bits of control status registers B (DMACB0 to
DMACB4).
[bit31, bit30] TYPE (TYPE): Transfer type setting
These bits are the transfer type setting bits and set the type of operation for the corresponding
channel.
• 2-cycle transfer mode: In this mode, the transfer source address (DMASA) and transfer
destination address (DMADA) are set and transfer is performed by repeating the read
operation and write operation for the number of times specified by the transfer count. All
areas can be specified as a transfer source or transfer destination (32-bit address).
• Fly-by transfer mode: In this mode, external <--> external transfer is performed in one cycle
by setting a memory address as the transfer destination address (DMADA). Be sure to
specify an external area for the memory address.
Table 14.2-8 shows the settings for the transfer types.
Table 14.2-8 Settings for the Transfer Types
TYPE
00
01
10
11
• When reset: Initialized to "00
• These bits are readable and writable.
30 29 28 27 26 25
TYPE[1:0] MOD [1:0] WS [1:0] SADMDADM DTCR SADR DADR
14 13 12 11 10
SASZ[7:0]
2-cycle transfer (initial value)
B
Fly-by: Memory --> I/O transfer
B
Fly-by: I/O --> memory transfer
B
Setting disabled
B
".
B
CHAPTER 14 DMA CONTROLLER (DMAC)
24 23 22 21 20 19
ERIE EDIE
9 8 7 6 5 4 3
DASZ[7:0]
Function
18 17 16 Initial value
00000000 00000000
DSS [2:0]
2 1 0
XXXXXXXX XXXXXXXX
B
B
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