Dma External Interface - Fujitsu FR60 Hardware Manual

32-bit microcontroller mb91301 series

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Table of Contents

CHAPTER 14 DMA CONTROLLER (DMAC)

14.6 DMA External Interface

This section provides operation timing charts for the DMA external interface.

■ DMA External Interface Pins

DMA channels 0, 1 have the following DMA-dedicated pins (DREQ, DACK, and DEOP):

DREQ: DMA transfer request input pin for demand transfer. A transfer is requested with an

DACK: This pin becomes active ("L" output) when DMA accesses an external area via the

DEOP: This pin becomes active ("L" output) in synchronization with the last access to

IORD: This signal becomes active when the direction I/O -> memory is selected for fly-by

IOWR: This signal becomes active when the direction memory -> I/O is selected for fly-by

Refer to "4.10 DMA Access Operation" for the operation example of DMA external interface.

external interface.

complete DMA transfer.