Dedicated Registers - Fujitsu FR60 Hardware Manual

3.4

Dedicated Registers

Use the dedicated registers for specific purposes. A program counter (PC), program
status (PS), table base register (TBR), return pointer (RP), system stack pointer (SSP),
user stack pointer (USP), and multiply and divide registers (MDH/MDL) are provided.
■ List of Dedicated Registers
A register consists of 32 bits.
Figure 3.4-1 shows the dedicated registers.
Program counter
Program status
Table base register
Return pointer
System stack pointer
User stack pointer
Multiply and divide registers
■ Program Counter (PC)
This section describes the functions of the program counter (PC: Program Counter).
The program counter (PC) consists of 32 bits. Figure 3.4-2 shows the configuration of program
counter (PC) bit.
PC
The program counter indicates the address of the instruction being executed.
If the PC is updated when an instruction is executed, bit0 is set to "0". Bit0 can be set to "1" only
if an odd-number address is specified as the branch address.
If bit0 is set to "1", however, bit0 is invalid and an instruction must be placed at the address that
is a multiple of "2".
The initial value upon reset is undefined.
Figure 3.4-1 Dedicated Registers
PC
PS
TBR
RP
SSP
USP
MDH
MDL
Figure 3.4-2 Configuration of Program Counter Bit
bit31
CHAPTER 3 CPU AND CONTROL UNITS
bit31
- ILM -
bit0
bit0
SCR CCR
[Initial value]
XXXXXXXX
H
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