Operation Of Branch Instructions With Delay Slot - Fujitsu FR60 Hardware Manual

3.9.1

Operation of Branch Instructions with Delay Slot

In operation with a delay slot, the instruction located just after a branch instruction
(placed in a "delay slot") is executed before the instruction that branches is executed.
■ Operation of Branch Instruction with Delay Slot
Since an instruction in the delay slot is executed before the branch operation, the apparent
execution speed is one cycle. However, a NOP instruction must be placed in the delay slot if
there is no valid instruction put there.
[Example]
;
LABEL :
If a conditional branch instruction is used, an instruction placed in the delay slot is executed
whether or not the condition for branching is met.
If a delay branch instruction is used, the order of execution for some instructions seems to be
reversed. However, this occurs only for updating the PC and the instructions are executed in the
specified order for other operations (register update and reference, etc.)
The following is a concrete example.
❍ JMP:D @Ri / CALL:D @Ri instruction
Ri referenced by the JMP:D @Ri / CALL:D @Ri instruction is not affected even though Ri is
updated by the instruction in the delay slot.
[Example]
List of instructions
ADD R1, R2
BRA:D LABEL
MOV R2, R3
...
ST R3, @R4
LDI:32 #Label, R0
JMP:D @R0
LDI:8 #0, R0
...
CHAPTER 3 CPU AND CONTROL UNITS
;
; Branch instruction
; Delay slot ... Executed before branch
; Branch destination
;
; Branch to Label
; No effect on the branch destination address
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