Fujitsu FR60 Hardware Manual page 442

CHAPTER 14 DMA CONTROLLER (DMAC)
■ Clearing Peripheral Interrupts by DMA
This DMA has a function that clears peripheral interrupts. This function works when peripheral
interrupt is selected as the DMA start source (when IS[4:0]=1XXXX
Peripheral interrupts are cleared only for the set start sources. That is, only the peripheral
functions set by IS[4:0] are cleared.
The timing for clearing an interrupt depends on the transfer mode (See Section "14.4 Operation
Flowcharts").
• Block/step transfer: If block transfer is selected, a clear signal is generated after one block
• Burst transfer:
• Demand transfer:
■ Temporary Stopping
DMA transfer is stopped temporary in the following cases:
❍ Setting of temporary stopping by writing to the control register (Set independently for
each channel or all channels simultaneously)
If temporary stopping is set using the temporary stop bit, transfer on the corresponding channel
is stopped until release of temporary stopping is set again. You can check the DSS bits for
temporary stopping.
When temporary stopping is released, the transfer is restarted.
❍ NMI/hold suppress level interrupt processing
If an NMI request or an interrupt request with a higher level than the hold suppress level occurs,
all channels on which transfer is in progress are temporarily stopped at the boundary of the
transfer unit and the bus right is opened to give priority to NMI/interrupt processing. Transfer
request accepted during NMI/interrupt processing are retained, initiating a wait for completion of
NMI processing.
Channels for which requests are retained restart transfer after NMI/interrupt processing is
completed.
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(step) transfer.
If burst transfer is selected, a clear signal is generated after transfer is
performed the specified number of times.
Since only start requests from external pins are supported in demand
transfer, no clear signal is generated.
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