Eit Interrupt Levels - Fujitsu FR60 Hardware Manual

CHAPTER 3 CPU AND CONTROL UNITS

3.10.1 EIT Interrupt Levels

The interrupt levels are 0 to 31 and are managed with five bits.
■ EIT Interrupt Levels
Table 3.10-1 shows the allocation of the levels.
Table 3.10-1 EIT Interrupt Levels
Binary
00000
...
...
00011
00100
00101
...
...
01110
01111
10000
10001
...
...
11110
11111
Operation is possible for levels 16 to 31.
The interrupt level does not affect an undefined instruction exception, no-coprocessor trap,
coprocessor error trap, or an INT instruction. It does not change the ILM, either.
80
Level
Interrupt source
Decimal
0 (Reserved for system)
...
...
3 (Reserved for system)
4 INTE instruction
Step trace trap
5 (Reserved for system)
...
...
14 (Reserved for system)
15 NMI (for user)
16
17
...
...
30
31
If the original ILM value is between
... 16 and 31, a program cannot set a
... value in this ILM range.
...
...
Interrupt User interrupts prohibited if ILM is set
Interrupt
...
...
Interrupt
- Interrupts prohibited if ICR is set
Note