Fujitsu FR60 Hardware Manual page 581

Table C-3 Pin States in External Bus 8-Bit Mode (3 / 3)
Specified
Port
Pin no. function
name
name
122 PA0 CS0
123 PA1 CS1
124 PA2 CS2
125 PA3 CS3
126 PA4 CS4/TRG2
127 PA5 CS5/PPG2
128 PA6 CS6
129 PA7 CS7
P00 to
132 to 139 D00 to D07
P07
P10 to
142 to 144 D08 to D10
P12
P : General-purpose port selected, F : Specified function selected
* : The following port's function can be used on only MB91302A and MB91V301A; SDA0, SCL0, SDA1, SCL1 of
68 to 71 pin, ICU0 to ICU3, FRCK of 81 to 85 pin.
Note : The bus width is determined after a mode vector fetch.
The bus width at initialization time is 8 bits.
At initialization (INIT)
Function
Function
name
name
Initial
value
Bus width Bus width
32 bits 8 bits
CS0 CS0
CS1 CS1
CS2 CS2
CS3 CS3
"H" output
CS4 CS4
CS5 CS5
CS6 CS6
CS7 CS7
P00 to P07 P00 to P07
Output Hi-Z
Input ready
P10 to P12 P10 to P12
APPENDIX C PIN STATE IN EACH CPU STATE
Stop mode
Sleep
mode
HIZ=0 HIZ=1
Output
"H" output "H" output
P : Previous P : Previous Output
state held state held
F : Output held F : Output
input 0
or Hi-Z held or Hi-Z
Bus open
(BGRNT)
CS CS not
shared shared
F : SREN=0:
F : SREN=0:
"H" output
"H" output
SREN=1 :
Hi-Z SREN=1 :
Output
Output Hi-Z
Hi-Z
Hi-Z/ Output
Output Hi-Z
Hi-Z
fixed
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