2-Cycle Transfer (I/O -> Sdram/Fcram) - Fujitsu FR60 Hardware Manual

CHAPTER 4 EXTERNAL BUS INTERFACE
4.10.8 2-Cycle Transfer (I/O -> SDRAM/FCRAM)
This section describes the operation of 2-cycle transfer (I/O device to SDRAM/FCRAM).
■ 2-Cycle Transfer (I/O -> SDRAM/FCRAM)
Figure 4.10-11 shows an operation timing chart assuming TYP3 to TYP0 set to 1000
to 0051
H
Figure 4.10-11 Timing Chart for 2-cycle Transfer (I/O to SDRAM/FCRAM)
MC LK
A31 to A00
AS
CS n
SRAS
SCAS
WR n(SWE)
CSn
RD
D31 to D00
DA CKn
FR30
compatible
mode
DEOPn
DACKn
Basic mode
DEOPn
DREQn
250
, and IOWR set to 00 .
H
I/O
address
memor y
idle
address
, AWR set
B