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CHAPTER 18 UART
18.4 Register of UART
18.4.5
UART Prescaler Control Register 0, 1 (UTCR0, UTCR1) and
UART Prescaler Reload Register 0, 1 (UTRLR0, UTRLR1)
UART prescaler control registers 0, 1 (UTCR0, UTCR1) are responsible of setting start-
up/halt of the prescaler, forced reset, and selecting clock sources. The UART prescaler
control registers 0, 1 (UTCR0, UTCR1) are also responsible of setting the division rate of
the machine clock by combining their lower 3 bits with UART prescaler reload registers
0, 1 (UTRLR0, UTRLR1).
■ UART Prescaler Control Register 0, 1 (UTCR0, UTCR1) and UART Prescaler Reload
Register 0, 1 (UTRLR0, UTRLR1)
The UART operation clock is obtained by dividing the machine clock. Is designed to obtain a certain level
of baud rate for a wide variety of machine cycles using this prescaler. Figure 18.4-7 shows the configuration
of UTCR0, UTCR1, UTRLR0, UTRLR1.
Figure 18.4-7 UART Prescaler Control Register 0, 1 (UTCR0, UTCR1)
UART prescaler control register 0, 1 (UTCR0, UTCR1)
UART prescaler reload register 0, 1 (UTRLR0, UTRLR1)
R/W : Reada
: Undefined
X : Undefined value
[bit15] MD: Prescaler permission bit
It is an operation permission bit of the prescaler.
0: Prescaler is stop.
1: Prescaler is in operation.
[bit14] SRST: UART compulsion reset bit
It is an internal reset bit for UART. Forcibly resets UART to initialize. Once initialized, turns to "0"
automatically.
0:State maintenance
1: Forced reset
402
and UART Prescaler Reload Register 0, 1 (UTRLR0, UTRLR1)
bit15 bit14
Address
ch.0 : 000025
H
MD SRST CKS
ch.1 : 00002B
H
R/W
R/W
Address
bit7
ch.0 : 000024
H
D7
ch.1 : 00002A
H
R/W
R/W
ble/Writable
FUJITSU MICROELECTRONICS LIMITED
bit13 bit12 bit11 bit10
D10
Reserved
R/W
R/W
R/W
bit5
bit6
bit4
bit3
bit2
D3
D6
D5
D4
D2
R/W
R/W
R/W
R/W
MB90335 Series
bit9
bit8
Initial value
D9
D8
0000X000
R/W
R/W
bit1
bit0
Initial value
00000000
D1
D0
R/W
R/W
CM44-10137-6E
B
B
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