External Interrupt And Nmi Controller Registers - Fujitsu FR60 Hardware Manual

9.2

External Interrupt and NMI Controller Registers

This section describes the configuration and functions of the registers used by the
external interrupt and NMI controller.
■ External Interrupt and NMI Controller Registers
Figure 9.2-1 shows the registers used by the external interrupt and NMI controller.
Figure 9.2-1 External Interrupt and NMI Controller Registers
bit 7 6
EN7 EN6
bit 15 14
ER7 ER6
bit 15 14
LB7 LA7
bit 7 6
LB3 LA3
CHAPTER 9 EXTERNAL INTERRUPT AND NMI CONTROLLER
5 4 3 2
EN5 EN4 EN3 EN2
13 12 11 10
ER5 ER4 ER3 ER2
13 12 11 10
LB6 LA6 LB5 LA5
5 4 3 2
LB2 LA2 LB1 LA1
1 0
EN1 EN0 External interrupt enable register
(ENIR)
9 8
ER1 ER0 External interrupt Request
Register (EIRR)
9 8
LB4 LA4
External interrupt request level
setting register (ELVR)
1 0
LB0 LA0
317