Operating Modes - Fujitsu FR60 Hardware Manual

CHAPTER 3 CPU AND CONTROL UNITS

3.14 Operating Modes

Two operating modes are provided: bus mode and access mode. This section
describes these modes.
■ Operating Modes
❍ Bus mode
Bus mode refers to a mode in which the operations of internal ROM and the external access
function are controlled. A bus mode is specified using the setting pins (MD2, MD1, and MD0)
and the ROMA bit in the mode data.
❍ Access mode
An access mode refers to a mode that controls the external data bus width. An access mode is
specified using the WTH1 and WTH0 bits in the mode register and the DBW1 and DBW0 bits in
ACR0 to ACR7 (Area Configuration Register0 to 7).
■ Bus Modes
The FR family has the following three modes: bus mode 0 (single chip mode), bus mode 1
(internal-ROM/external-bus mode), and bus mode 2 (external-ROM/external-bus mode). The
bus mode 2 (external-ROM/external-bus mode) can only be set for MB91V301A.
All bus modes can be set for MB91302A.
For more information, see Section "3.1 Memory Space".
❍ Bus mode 0 (single chip mode)
The internal I/O, D-busRAM, F-busRAM, and F-busROM are valid, while access to any other
areas is invalid under this mode.
The external pins serve as peripherals or general-purpose ports. The pin does not work as a
bus pin.
❍ Bus Mode 1 (internal-ROM/external-bus mode)
In this mode, the internal I/O, D-busRAM, F-busRAM, and F-busROM are valid. Access to an
area that enables external access is handled as access to an external space. Some external
pins serve as bus pins.
❍ Bus Mode 2 (external-ROM/external-bus mode)
In this mode, the internal I/O, and D-busRAM are valid. All accesses are handled as access to
an external space. Some external pins serve as bus pins.
140
B u s m o d e
External-ROM
External-bus
A c c e s s m o d e
32-bit bus width
16-bit bus width
8-bit bus width