Fujitsu FR60 Hardware Manual page 107

Table 3.10-4 Vector Table (3 / 3)
Interrupt source
Reserved for system
Reserved for system
Reserved for system
Delayed interrupt source bit
Reserved for system (used in
REALOS)
Reserved for system (used in
REALOS)
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Reserved for system
Used in INT instruction
Interrupt number
Decimal Hexadecimal
60 3C
61 3D
62 3E
63 3F
64 40
65 41
66 42
67 43
68 44
69 45
70 46
71 47
72 48
73 49
74 4A
75 4B
76 4C
77 4D
78 4E
79 4F
80 50
to to
255 FF
CHAPTER 3 CPU AND CONTROL UNITS
Interrupt
Offset address of
level
ICR44 30C 000FFF0C
H
ICR45 308 000FFF08
H
ICR46 304 000FFF04
H
ICR47 300 000FFF00
H
- 2FC 000FFEFC
H
- 2F8 000FFEF8
H
- 2F4 000FFEF4
H
- 2F0 000FFEF0
H
- 2EC 000FFEEC
H
- 2E8 000FFEE8
H
- 2E4 000FFEE4
H
- 2E0 000FFEE0
H
- 2DC 000FFEDC
H
- 2D8 000FFED8
H
- 2D4 000FFED4
H
- 2D0 000FFED0
H
- 2CC 000FFECC
H
- 2C8 000FFEC8
H
- 2C4 000FFEC4
H
- 2C0 000FFEC0
H
2BC 000FFEBC
H
- to
000 000FFC00
H
Default
RN
TBR
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
H
to -
H
87