Fujitsu FR60 Hardware Manual page 166

CHAPTER 4 EXTERNAL BUS INTERFACE
■ Block Diagram
Internal address bus
146
Figure 4.1-1 Block Diagram of the External Bus Interface
Internal data bus
32 32
write buffer
read buffer
address buffer
ASR
ASZ
MUX
switch
switch
DATA BLOCK
ADDRESS BLOCK
+1 or +2
comparator
SDRAM control
RCR
underflow
refresh counter
External terminal controller
block control
registers
&
control
External data bus
External address bus
CS0 to CS7
SRAS,SCAS,
SWE,MCLKE,
DQMUU,DQMUL,
DQMLU,DQMLL
RD
WR0,WR1,
WR2,WR3,
AS,BAA
BRQ
BGRNT
RDY