Fujitsu FR60 Hardware Manual page 426

CHAPTER 14 DMA CONTROLLER (DMAC)
■ Transfer Type
❍ 2-cycle transfer (normal transfer)
The DMA controller operates using a read operation and a write operation as its unit of
operation.
Data is read from an address in the transfer source register and then written to another address
in the transfer destination register.
❍ Fly-by transfer (memory --> I/O)
The DMA controller operates using a read operation as its unit of operation.
If DMA transfer is performed when fly-by transfer is set, DMA issues a fly-by transfer (read)
request to the bus controller and the bus controller lets the external interface carry out the fly-by
transfer (read).
❍ Fly-by transfer (I/O --> memory)
The DMA controller operates using a write operation as its unit of operation.
Otherwise, operation is the same as fly-by transfer (memory --> I/O) operation.
Access areas used for MB91301 series fly-by transfer must be external areas.
■ Transfer Address
The following types of addressing are available and can be set independently for each channel
transfer source and transfer destination.
The method for specifying the address setting register (DMASA/DMADA) for a 2-cycle transfer
and the method for a fly-by transfer are different.
❍ Specifying the address for a 2-cycle transfer
The value read from a register (DMASA/DMADA) in which an address has been set in advance
is used as the address for access. After receiving a transfer request, DMA stores the address
from the register in the temporary storage buffer and then starts transfer.
After each transfer (access) operation, the next access address is generated (increment/
decrement/fixed selectable) by the address counter and then written to the temporary storage
buffer. Because the contents of the temporary storage buffer are written back to the register
(DMASA/DMADA) after each block transfer unit is completed, the address register (DMASA/
DMADA) value is updated after each block transfer unit is completed, making it impossible to
determine the address in real time during transfer.
❍ Specifying the address for a fly-by transfer
In a fly-by transfer, the value read from the transfer destination address register (DMADA) is
used as the address for access. The transfer source address register (DMASA) is ignored. Be
sure to specify an external area as the address to be set.
After receiving a transfer request, DMA stores the address from the register in the temporary
storage buffer and then starts transfer.
After each transfer (access) operation, the next access address is generated (increment/
decrement/fixed selectable) by the address counter and then written to the temporary storage
buffer. Because the contents of this temporary storage buffer are written back to the register
(DMADA) after each block transfer unit is completed, the address register (DMADA) value is
updated after each block transfer unit is completed, making it impossible to determine the
address in real time during transfer.
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