CHAPTER 3 CPU AND CONTROL UNITS
3.9
Branch Instructions
An operation with or without a delay slot can be specified for a branch instruction
used in the FR family.
■ Branch Instructions with Delay Slot
Instructions written as follows perform a branch operation with a delay slot:
JMP:D
BRA:D
BC:D
BV:D
BLE:D
74
@Ri
CALL:D
label9
BNO:D
label9
BNC:D
label9
BNV:D
label9
BGT:D
label12
CALL:D
label9
BEQ:D
label9
BN:D
label9
BLT:D
label9
BLS:D
@Ri
RET:D
label9
BNE:D
label9
BP:D
label9
BGE:D
label9
BHI:D
label9
label9
label9
label9