Fujitsu FR60 Hardware Manual page 456

CHAPTER 14 DMA CONTROLLER (DMAC)
(Continued)
MB91301
Read cycle
I-bus
D-bus
MB91301
Read cycle
I-bus
D-bus
MB91301
Read cycle
I-bus
D-bus
436
Built-in I/O area => internal RAM area transfer
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM I/O
Internal RAM area => external area transfer
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM I/O
Internal RAM area => built-in I/O area transfer
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM I/O
MB91301
DMAC
Write cycle
I-bus
Bus controller
D-bus
Data buffer
F-bus
RAM
MB91301
DMAC
Write cycle
I-bus
Bus controller
D-bus
Data buffer
F-bus
RAM
MB91301
DMAC
Write cycle
I-bus
Bus controller
D-bus
Data buffer
F-bus
RAM
X-bus
I/O
X-bus
I/O
X-bus
I/O