E.1 Overview - Analog Devices ADSP-2106x SHARC User Manual

Control/Status Registers
E.1 OVERVIEW
This appendix provides bit definitions for the ADSP-2106x's control and
status registers. Some of the registers are located in the processor core;
these are called system registers, a subset of the processor's universal
register set. The core processor system registers are MODE1, MODE2,
ASTAT, STKY, IRPTL, IMASK, IMASKP, USTAT1, and USTAT2.
The remaining control registers are located in the ADSP-2106x's I/O
Processor (IOP). These include the SYSCON and SYSTAT registers. These
registers are memory-mapped in ADSP-2106x internal memory.
Register Function
MODE1 Mode Control 1
MODE2 Mode Control 2
ASTAT Arithmetic Status
STKY Sticky Status
IRPTL Interrupt Latch
IMASK Interrupt Mask
IMASKP Interrupt Mask Pointer
USTAT1 User Status 1
USTAT2 User Status 2
Table E.1 System Registers (Core Processor)
* MODE2 bits 28-31 are the processor ID and silicon revision #.
** ASTAT bits 19-22 are equal to the values of the FLAG0-3 input pins after reset;
the flag pins are configured as inputs after reset
Register Function
SYSCON System Configuration
SYSTAT System Status
Table E.2 IOP Registers (I/O Processor)
* SYSTAT bits 4-11 depend on the value of the ID
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Initialization After Reset
0x0000 (cleared)
0xn000 0000 *
0x00nn 0000 **
0x0540 0000
0x0000 (cleared)
0x0003
0x0000 (cleared)
0x0000 (cleared)
0x0000 (cleared)
Initialization After Reset
0x0000 0010
0x0000 0nn0 *
inputs.
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