Link Port Dma Control - Analog Devices ADSP-2106x SHARC User Manual

The D2DMA bit places the DMA controller in two-dimensional SPORT
DMA mode on the ADSP-21060 and ADSP-21062. Two-dimensional
SPORT DMA mode is not applicable to the ADPS-21061. This bit should
be cleared (to 0) for standard operation.
Each serial port has a transmit DMA interrupt and a receive DMA
interrupt. When serial port DMA is not enabled, a TX interrupt occurs
when the TX buffer is not full and a RX interrupt occurs when the RX
buffer is not empty.
Interrupt
Name Interrupt
SPR0I SPORT0 Receive DMA Channel
SPR1I SPORT1 Receive DMA Channel
SPT0I SPORT0 Transmit DMA Channel
SPT1I SPORT1 Transmit DMA Channel
Table 6.6 SPORT DMA Interrupts
6.2.3

Link Port DMA Control

The six link ports on ADSP-21060 and ADSP-21062 DSPs can also use
DMA transfers to handle transmit and receive data. DMA channels 4 and
5 are dedicated to link buffers 2 and 3, respectively. The other link buffers
share DMA channels with the serial ports and external port. [Note that
the discussion in this section applies only to ADSP-21060 and ADSP-
21062 DSPs; the topics here do not apply to the ADSP-21061 DSP because
this DSP does not have link ports.]
DMA Data
Channel # Buffer
DMA Channel 1 RX1 (or LBUF0)
DMA Channel 3 TX1 (or LBUF1)
DMA Channel 4 LBUF2
DMA Channel 5 LBUF3
DMA Channel 6 EPB0 (or LBUF4)
DMA Channel 7 EPB1 (or LBUF5)
Table 6.7 Link Port DMA Channels
www.BDTIC.com/ADI
DMA
HIGHEST PRIORITY
LOWEST PRIORITY
Description
Serial Port 1 Receive (or Link Buffer 0)
Serial Port 1 Transmit (or Link Buffer 1)
Link Buffer 2
Link Buffer 3
External Port Buffer 0 (or Link Buffer 4)
External Port Buffer 1 (or Link Buffer 5)
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