Link Port Interrupts With Dma Enabled - Analog Devices ADSP-2106x SHARC User Manual

If the DMA is disabled but the associated link buffer is enabled, then a
maskable interrupt is generated whenever a receive buffer is not
empty or when a transmit buffer is not full.
The interrupt latch bit in IRPTL may be masked in the corresponding
IMASK register bit. When initially enabling the IMASK bit, the
corresponding bit in IRPTL should be cleared first to clear out any
request that may have been inadvertently latched.
The interrupt service routine should test the buffer status after each
read or write to check when the buffer is empty or full, in order to
determine when it should return from interrupt. This will reduce the
number of interrupts it must service.
9.6.2

Link Port Interrupts With DMA Enabled

A link port interrupt is generated when the DMA operation is done—
i.e. when the block transfer has completed and the DMA count register
is zero.
There is an option for implementing a protocol to send additional
control information at the end of a block transfer. Because the receive
DMA buffer is empty when the DMA block has completed, the
external bus master can send up to two additional words to the slave
ADSP-2106x's buffer which has space for the two words. The slave's
DMA done interrupt service routine could then read the buffer and use
these control words to determine the next course of action.
9.6.3 Link Port Service Request Interrupts (LSRQ)
Link port service requests allow a disabled (unassigned or assigned
and buffer disabled) link port to cause an interrupt when an external
access is attempted. The transmit and receive request status bits of the
LSRQ register (bits 20-31) allow an ADSP-2106x to determine if
another ADSP-2106x is attempting to send or receive data through a
particular link port. This lets two processors comunicate without prior
knowledge of the transfer direction, link port number, or exactly when
the transfer is to occur.
When LxACK or LxCLK is asserted externally, a link service request
(LSR) is generated in a disabled (unassigned or assigned and buffer
disabled) link port. LSRs will not be generated for a link port that is
disabled by loopback mode. Each LSR is gated by mask bits before
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Link Ports 9
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