Analog Devices ADSP-2106x SHARC User Manual page 665

Control/Status Registers
/* I/O Processor Registers */
#define SYSCON 0x00
#define VIRPT 0x01
#define WAIT 0x02
#define SYSTAT 0x03
#define EPB0 0x04
#define EPB1 0x05
#define EPB2 0x06
#define EPB3 0x07
#define MSGR0 0x08
#define MSGR1 0x09
#define MSGR2 0x0a
#define MSGR3 0x0b
#define MSGR4 0x0c
#define MSGR5 0x0d
#define MSGR6 0x0e
#define MSGR7 0x0f
#define BMAX 0x18
#define BCNT 0x19
#define ELAST 0x1b
#define DMAC6 0x1c
#define DMAC7 0x1d
#define DMAC8 0x1e
#define DMAC9 0x1f
/* II4, IM4, C4, CP4, Gp4, DB4, & DA4 reg's are not on the ADSP-21061
#define II4 0x30
#define IM4 0x31
#define C4 0x32
#define CP4 0x33
#define GP4 0x34
#define DB4 0x35
#define DA4 0x36
#define DMASTAT 0x37
/* II5, IM5, C5, CP5, Gp5, DB5, & DA5 reg's are not on the ADSP-21061
#define II5 0x38
#define IM5 0x39
#define C5 0x3a
#define CP5 0x3b
#define GP5 0x3c
#define DB5 0x3d
#define DA5 0x3e
#define II6 0x40
#define IM6 0x41
#define C6 0x42
#define CP6 0x43
#define GP6 0x44
#define EI6 0x45
#define EM6 0x46
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/* System configuration register
/* Vector interrupt register
/* Wait state configuration for ext. memory */
/* System status register
/* External port DMA buffer 0
/* External port DMA buffer 1
/* External port DMA buffer 2, not on 21061 */
/* External port DMA buffer 3, not on 21061 */
/* Message register 0
/* Message register 1
/* Message register 2
/* Message register 3
/* Message register 4
/* Message register 5
/* Message register 6
/* Message register 7
/* Bus time-out maximum
/* Bus time-out counter
/* Address of last external access
/* DMA6 control register
/* DMA7 control register
/* DMA8 control register, not on 21061
/* DMA9 control register, not on 21061
/* Internal DMA4 memory address
/* Internal DMA4 memory access modifier
/* Contains number of DMA4 transfers remaining */
/* Points to next DMA4 parameters
/* DMA4 General purpose / 2-D DMA
/* DMA4 General purpose / 2-D DMA
/* DMA4 General purpose / 2-D DMA
/* DMA channel status register
/* Internal DMA5 memory address
/* Internal DMA5 memory access modifier
/* Contains number of DMA5 transfers remaining */
/* Points to next DMA5 parameters
/* DMA5 General purpose / 2-D DMA
/* DMA5 General purpose / 2-D DMA
/* DMA5 General purpose / 2-D DMA
/* Internal DMA6 memory address
/* Internal DMA6 memory access modifier
/* Contains number of DMA6 transfers remaining */
/* Points to next DMA6 parameters
/* DMA6 General purpose
/* External DMA6 address
/* External DMA6 address modifier
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