Parallel Multiplier & Alu (Floating-Pt.) - Analog Devices ADSP-2106x SHARC User Manual

Multifunction
B Compute Operations
Parallel Multiplier & ALU (Floating-Pt.)
Floating-Point:
Syntax: See Table B.7
Compute Field:
22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 OPCODE
The multiplier and ALU operations are determined by OPCODE. The
selections for the 6-bit OPCODE field are listed in Table B.7. The
multiplier x- and y-operands are received from data registers RXM (FXM)
and RYM (FYM). The multiplier result operand is returned to data
register RM (FM). The ALU x- and y-operands are received from data
registers RXA (FXA) and RYA (FYA). The ALU result operand is returned
to data register RA (FA).
The result operands can be returned to any registers within the register
file. Each of the four input operands is restricted to a particular set of four
data registers.
Input
Multiplier X:
Multiplier Y:
ALU X:
ALU Y:
B – 80
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F
FM FA X
M
Allowed Sources
R3-R0 (F3-F0)
R7-R4 (F7-F4)
R11-R8 (F11-F8)
R15-R12 (F15-F12)
F F F
Y X Y
M A A